news

Mar 20, 2026 “Characterizing the Impact of Congestion in Modern HPC Interconnects” has been accepted to ISC High Performance 2026!
Feb 28, 2025 “FIPLib: An Image Processing Library for FPGAs Using High-Level Synthesis” has been accepted to the International Journal of Parallel Programming!
Feb 11, 2025 “Fast and Energy-Efficient N-Body Simulation on FPGA through High-Level Synthesis” has been accepted to PDP 2025!
Jan 17, 2025 New article posted! How To: NVIDIA Forward Compatibility between different CUDA and GPU Driver versions on Medium
Dec 16, 2024 “COREC: Concurrent Non-Blocking Single-Queue Receive Driver for Low Latency Networking” has been accepted to Elsevier Computer Networks!
Dec 19, 2023 I’m starting a new position as a Researcher at ENEA, the Italian National Agency for New Technologies, Energy and Sustainable Economic Development.
Jul 10, 2023 Website is up and running!